Amplifier circuit

ABSTRACT

A push-pull amplifier circuit using bipolar transistors in which non-linear distortion caused by the base-emitter voltages of the amplifying transistors of the circuit is eliminated without the use of negative AC feedback and in which variations in a DC output level at the output terminal of the amplifier are detected and fed back to the input side of the amplifier whereby the stability of the circuit at very low frequencies is remarkably improved. A first amplifier stage includes a first transistor having a base to which an input signal is applied and a second transistor the base of which is coupled to an output of the first transistor with the second transistor being of the opposite conductivity type to the first transistor. A current mirror circuit supplies currents to the first and second transistors with the currents thus supplied having a constant ratio. A second amplifying stage is provided having the same construction. A load is coupled to be driven by the current flowing through the first transistor in the first amplifying stage and by the corresponding transistor in the second amplifying stage. Variations in the output of the circuit are detected to provide a DC feedback voltage which is coupled back to emitter circuits in the input stages of the amplifier.

BACKGROUND OF THE INVENTION

The present invention relates to an amplifier circuit. Moreparticularly, the invention relates to push-pull amplifiers usingbipolar transistors.

It is necessary in an amplifier to minimize distortion in the outputtherefrom. A large variety of distortion reducing techniques have beenproposed. According to one well-known technique, distortion is reducedby the use of AC negative feedback. In this case, however, theamplification factor is unavoidably reduced. Therefore, in order toobtain a desired amplification factor, an increased number of amplifyingelements or stage is required. Further, the stability of the overallamplifier circuit is reduced with the use of this technique.

More specifically, transistors commonly used as amplifying elements havesomewhat non-linear input/output characteristics. In view of thisdisadvantage, it has been proposed to employ a large amount of ACnegative feedback. However, the use of a large amount of negativefeedback does not adequately compensate for the non-linearities.

Further, in an ordinary push-pull amplifiers using bipolar transistors,generally, two voltage sources, one positive and the other negative areused. Accordingly, it is necessary to always maintain the potentiallevel at the output terminal of the amplifier at a neutral level betweenthe positive level and the negative level, that is, at ground level.

If a DC voltage were present at the output terminal, DC current may flowthrough a load such as a loudspeaker connected to the output terminalresulting in damage to the loudspeaker.

SUMMARY OF THE INVENTION

Accordingly, a primary object of the present invention is to eliminatethe above-described drawbacks accompanying the conventional amplifiercircuits.

More specifically, an object of the invention is to provide a push-pulltype transistor amplifier circuit capable in which non-linear distortioncaused by the transistors thereof is eliminated without the use of ACnegative feedback. Another object of the invention is to provide atransistor amplifier circuit in which variations in the DC outputpotential level at the output terminal thereof are detected and used toform DC feedback to the input side of the amplifier circuit whereby thestability of the circuit for very low frequencies is remarkablyimproved.

These, as well as other objects of the invention, are met by a push-pullamplifier circuit including first and second amplifying means or stages.The first amplifying means includes a first transistor having a base towhich an input signal is applied and a second transistor having a baseto which an output of the first transistor is applied. The secondtransistor is opposite in conductivity type to the first transistor.Means is provided, such as a current mirror circuit, for supplyingcurrents to the first and second transistors with the ratio of thecurrents supplied to the first and second transistors being maintainedconstant. Similarly, the second amplifying means includes a thirdtransistor having a base to which an input signal is applied, which maybe the same input signal applied to the base of the first transistor,and a fourth transistor having a base to which an output of the thirdtransistor is applied. The fourth transistor is of the oppositeconductivity type to the third transistor. Means is provided forsupplying currents to the third and fourth transistors with the ratio ofthe currents supplied to the third and fourth transistors beingconstant. A load is coupled to be driven by the current flowing throughthe first and second transistors and by the current flowing through thesecond and fourth transistors. The first and third transistors may beconnected in emitter follower configurations with the emitter followeroutputs thereof applied to the bases of the second and fourthtransistors.

Yet further, the objects of the invention are met by an amplifiercircuit including a first transistor having a base to which an inputsignal is applied, a second transistor having a base to which the outputof the first transistor is applied with the second transistor beingopposite in conductivity type to the first transistor. Means is providedfor supplying currents to the first and second transistors with thosecurrents having a constant ratio. Means is provided for forming anoutput corresponding to variations in the currents flowing through thefirst and second transistors as low as means for detecting variations ofthe output of the output providing means to provide a feedback voltagecorresponding to the variations to a predetermined circuit point. Theoutput of the detecting means may, for example, be fed back to theemitter side of the second transistor. The first transistor may beconnected in an emitter follower configuration with the emitter followeroutput of the first transistor applied to the base of the secondtransistor. The first transistor is preferably opposite in conductivitytype to the third transistor.

In any of these embodiments, the push-pull amplifier circuit can furtherinclude means for providing an output corresponding to the currentflowing through one of the first and second transistors andcorresponding to the current flowing through one of the third and fourthtransistors to thereby drive the load. Means is then provided fordetecting variations in the output of the output providing means tothereby provide a feedback voltage corresponding to the variations whichis coupled to a predetermined circuit point the output of which thedetecting means is preferably fed back to the emitters of the second andfourth transistors. The first and third transistors in that case areconnected in emitter follower configurations with the emitter followeroutputs thereof applied to the bases of the second and fourthtransistors, respectively.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIG. 1 is a circuit diagram for the purpose of describing a principle ofthe present invention;

FIG. 2 is a circuit diagram showing a preferred embodiment of apush-pull amplifier circuit according to the invention;

FIG. 3 is a circuit diagram showing another embodiment of a push-pullamplifier circuit of the invention;

FIG. 4 is a circuit diagram for describing an operating principle of anamplifier circuit in which DC feedback is employed; and

FIG. 5 is a circuit diagram showing a preferred embodiment of apush-pull amplifier having a DC servo control circuit according to theinvention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will be described in detail hereinafter withreference to the accompanying drawings.

FIG. 1 is a circuit diagram for the purpose of describing a principle ofthe invention. In FIG. 1, an amplifier circuit according to theinvention includes a first amplifier stage 1 and a second amplifierstage 2 which are coupled in a complementary symmetry circuit. The firstamplifier stage 1 includes an emitter follower PNP transistor Q₁ theemitter output of which is applied to the base of an NPN transistor Q₂as a base input. The emitter of the transistor Q₂ is connected throughan emitter resistor R₁ to a negative voltage source -B₃. The collectorof the input transistor Q₁ is directly connected to a negative voltagesource -B₂. A current source 3 such as a current mirror circuit isprovided to supply currents I₁ and I₂ having a constant ratio to thetransistors Q₁ and Q₂, respectively.

The current mirror circuit 3 is composed of emitter resistors R₂ and R₃PNP transistors Q₃ and Q₄ whose bases are connected commonly, as shownin FIG. 1. The transistor Q₄ is connected in a diode configuration. Byproperly selecting resistance values of the resistors R₂ and R₃, theratio I₁ /I₂ of currents respectively supplied to the transistors Q₁ andQ₂ is set to a desired value 1/α where α is a constant. In theembodiment shown in FIG. 1 the voltage developed across the emitterresistor R₂ of the transistor Q₄ is used as an output signal V_(OUT1).

The second amplifier stage 2 which is coupled complementarily to thefirst amplifier stage 1, includes transistors Q₅ through Q₈corresponding to the above transistors Q₁ through Q₄ as complementaryelements. The arrangement of the circuit elements in the secondamplifier stage 2 is identical to those of the first amplifier stage 1.The transistors Q₇ and Q₈ constitute a current mirror circuit 4 as acurrent supply circuit together with emitter resistors R₅ and R₆. Theratio of currents I₃ and I₄ supplied to the transistors Q₅ and Q₆,respectively, is made constant as described above.

The operation of the above described circuit construction will bedescribed in detail with reference primarily to the first amplifierstage 1 only as the operation of the two stages is basically the same.With the base-emitter voltages of the transistors Q₁ and Q₂ representedby V_(BE1) and V_(BE2), the following expression is established:

    I.sub.2 =(V.sub.IN +V.sub.BE1 -V.sub.BE2 +B.sub.3)/R.sub.1. (1)

Generally, the relationship between the collector current I_(C) of atransistor and the base-emitter voltage V_(BE) thereof is expressed asfollows: ##EQU1## where q is the electron charge, k is Boltzmann'sconstant, T the absolute temperature and I_(S) the base-emitter reversesaturation current. Accordingly, (V_(BE1) -V_(BE2)) in equation (1) canbe expressed as follows: ##EQU2## where T₁ is the temperature at thejunction between the base and emitter of the transistor Q₁, T₂ is thetemperature at the junction between the base and emitter of thetransistor Q₂, and α=I₂ /I₁. Since I_(S) is a fixed value for eachtransistor, I_(S2) can be replaced by βI_(S1) where β is a constant.Further, I_(S) is extremely small. If a sufficiently large collectorcurrent flows through the transistor, I_(C) /I_(S) is much greaterthan 1. Therefore, the following expression can be established: ##EQU3##

In equation (4), assuming that the junction temperature is constant:##EQU4## Consequently, the right side of equation (5) can be regarded asa constant. Representing the contant value by γ, equation (1) isrewritten as follows:

    I.sub.2 =(V.sub.IN +B.sub.3 +γ)/R.sub.1.             (6)

As a result, the output V_(OUT1) can be expressed as follows: ##EQU5##

Similarly, in the second amplifier stage 2, the following expression isestablished: ##EQU6##

If the respective resistance values of the resistors R₁, R₂, R₄ and R₅are determined such that R₁ =R₄ and R₂ =R₅, and the output V_(OUT1) andV_(OUT2) are suitably combined to drive a load in a push-pull manner,the gain of the overall push-pull amplifier circuit is twice the gain ineach amplifier stage defined by R₂ /R₁ =R₅ /R₄. Furthermore, the finaloutput is completely independent of the base-emitter voltage V_(BE).Thus, distortion in the output is greatly suppressed. In addition, as iswell known in the art, because of the push-pull arrangement, distortioncaused by the presence of even numbered higher harmonics is reduced.This results in a great improvement in decreasing the distortion in theoutput signal. That, is although in each amplifier, as indicated by theequations (7) and (8), the outputs V_(OUT1) and V_(OUT2) are independentof the base-emitter voltages V_(BE), practically, in view of the factthat the transistors have characteristics different from each other, thebase currents flowing therethrough are also different from each otherand thus complete suppression of distortion is not accomplished in eachstage. However, according to the invention, since the circuit has apush-pull arrangement, complete distortion suppression is provided.

In order to obtain an output signal, the variations in currents flowingthrough the transistors Q₂ and Q₆ are used to form the output. However,the way in which the output signal is provided is not particularlylimited to that shown in FIG. 1. More specifically, resistors may beprovided between the collector of the transistor Q₂ and the currentsource 3 and between the collector of the transistor Q₆ and the currentsource 4, respectively, and the voltages appearing across the resistorused as an output. Furthermore, in the case no amplified output isrequired, the output appearing across either emitter resistor R₁ or R₄may be used. Moreover, since the currents flowing through thetransistors Q₂ and Q₆ also flow through the transistors Q₁ and Q₅ withthe same current ratio due to the operation of the current mirrorcircuits, resistors can be provided in either the collector or theemitter circuits of the transistors Q₁ and Q₅ and the voltagethereacross used as an output.

FIG. 2 is a circuit diagram showing a preferred example of an amplifiercircuit where the outputs from the amplifier 1 and 2 shown in FIG. 1 arecombined to drive a load (not shown) in a push-pull manner. In FIG. 2, aPNP transistor Q₉ is connected in such a manner that the base of thetransistor Q₉ is commonly coupled to the base of the transistor Q₄ inthe current mirror circuit 3, the emitter of the transistor Q₉ isconnected through a resistor R₇ to a positive voltage source +B₁ and thecollector thereof is grounded via a reference biasing source E₁ and aresistor R₉.

An NPN transistor Q₁₀ is provided with the base of the transistor Q₁₀commonly connected to the base of the transistor Q₈ in the currentmirror circuit 4, the emitter thereof coupled through a resistor R₈ to anegative voltage source -B₁ and the collector thereof grounded via areference biasing source E₂ and the resistor R₉. The collector outputsof the transistor Q₉ and Q₁₀ are employed as base driving signals ofoutput push-pull driving transistors Q₁₁ and Q₁₂. The emitters of theNPN transistor Q₁₁ and the PNP transistor Q₁₂ are connected to oneanother through emitter resistors R₁₀ and R₁₁ to drive the load in apush-pull manner.

In this case, if the ratio of currents flowing through the transistorsQ₉ and Q₄ is maintained at a constant value of 1/α, the conditions ofequation (1) are also established, and further the voltage V_(B) at acommon base line of the current mirror circuit 3 can be expressed asfollows:

    V.sub.B =+B.sub.1 -V.sub.BE4 -I.sub.2 R.sub.2.             (9)

Rearranging equation (9) by substituting equation (1) thereinto:##EQU7## Further, the current I₃ flowing from the transistor Q₉ to theresistor R₉ is represented as follows:

    I.sub.3 =(+B.sub.1 -V.sub.BE9 -V.sub.B)/R.sub.7.           (11)

Therefore, the base voltage V₁ of the transistor Q₁₁ is: ##EQU8##Substituting equation (10) into equation (12): ##EQU9##

In equation (13), (V_(BE1) -V_(BE2)) is a constant γ in view of equation(5) and (V_(BE4) -V_(BE9)) can be expressed as: ##EQU10##

The above equation represents the I_(S) ratio of the transistors Q₉ andQ₄. Since this expression can also regarded as constant γ', equation(13) is as follows: ##EQU11## With regard to the base voltage V₂ of thetransistor Q₁₂ in the second amplifier stage 2, the following equationis similarly established: ##EQU12##

If the biasing voltage E₁ is set equal to the sum of the base-emittervoltage V_(BE11) of the transistor Q₁₁ and the voltage across theresistor R₁₀ and the biasing voltage E₂ set equal to the sum of thebase-emitter voltage V_(BE12) of the transistor Q₁₂ and the voltageacross the resistor R₁₁, E₁ in equation (15) and E₂ in equation (16) canbe eliminated to thereby obtain the push-pull output voltage signalV_(OUT). As is clear from the above description, this output voltagesignal V_(OUT) is independent of the base-emitter voltage V_(BE) of theamplification transistor thereby resulting in a significant decrease indistortion.

In this case, if the resistance values of the resistors R₁, R₂, R₄, R₅,R₇ and R₈ are selected such that R₁ =R₄, R₂ =R₅ and R₇ =R₈, as is clearfrom equations (15) and (16), the overall circuit gain is twice the gainof an ordinary single amplifier. In addition to this, the offset voltagein the output voltage signal V_(OUT) also is zero as is desired.

FIG. 3 is a circuit diagram showing another embodiment of an amplifiercircuit of the present invention in which circuit components that arecommon to those shown in FIG. 1 bear the same reference numerals. Inthis example, base biasing sources E₃ and E₄ are connected to the basesof the transistors Q₁ and Q₅ in the input stage, respectively, andfurther an input resistor R₁₂ is provided. The collectors of thetransistors Q₁ and Q₅ are commonly connected and the emitter resistorsR₁ and R₄ of the output transistors Q₂ and Q₆ are also commonlyconnected, the common connection point being used as an output terminal.Compared with the embodiment shown in FIG. 2, the number of voltagesources is decreased but the offset voltage in the output voltage signalV_(OUT) nonetheless is reduced to zero. It should be noted that a PNPtransistor Q₁₃ and an NPN transistor Q₁₄ that are additionally providedin the current mirror circuits 3 and 4, respectively, are added toimprove the accuracy in the current mirror outputs whereby the ratio ofcurrents supplied to the transistors Q₁ and Q₂ and the ratio of currentssupplied to the transistors Q₇ an Q₈ are more effectively made constantto completely eliminate any distortion in the base-emitter voltagesV_(BE) of the respective transistors.

In the above-described embodiments of amplifier circuits constructedaccording to the invention, with the gain at unity because thetransistors in the respective stages are connected in anemitter-follower configuration, since the amplifier circuit is formed asa class B push-pull amplifier, non-linearities in the output signalcaused by non-linearities in the base-emitter voltages B_(BE) can becompletely eliminated thereby resulting in the elimination of crossoverdistortion.

Next, an amplifier circuit in which variations in the DC outputpotential level at the output terminal of the amplifier circuit isdetected and fed back as a DC level to the input side of the amplifierthereby resulting in an improvement in the stability of the circuit atvery low frequencies range will be described.

FIG. 4 is a circuit diagram for describing an operating principle of anamplifier circuit in which DC feedback is employed. In this figure, thesame circuit elements as those shown in FIGS. 1 to 3 are designated bythe same reference numerals or characters. A DC level variationdetecting circuit 5 which operates to detect DC level variations at theoutput terminal of the amplifier circuit is constituted by a DC servocircuit together with an inverter 6. The inverter 6 operates to invertthe polarity of a signal corresponding to the output variations and thenapplies (feeds back) the inverted signal through an emitter resistorR_(1A) to the emitter of the transistor Q₂.

In this circuit, with R₁ =R_(1A) +R_(1B) as in the case of the circuitsshown in FIGS. 1 to 3, the conditions of equations (1) to (6) areestablished. Therefore, the output V_(OUT) is expressed as follows:##EQU13##

As is clear from equation (7'), the gain of the circuit is defined by R₂/R₁ and the output V_(OUT) is completely independent of the base-emittervoltage V_(BE) of the amplifying transistor. Consequently, suppressionof distortion is accomplished.

When the DC potential level increases, the DC level variation detectingcircuit 5 detects such fact and in response generates a DC voltagesignal proportional thereto. The DC voltage signal is applied to theinverter 6 where its polarity is inverted. Then, the thus obtained servovoltage signal is applied to the emitter of the transistor Q₂. As aresult, the emitter voltage decreases and thus the current flowingthrough the transistor Q₂ is increased whereby the voltage drop acrossthe resistor R₂ is also increased. Accordingly, the DC level at theoutput terminal is reduced. DC servo control is attained in the abovedescribed manner.

A low-frequency range filter such as a smoothing circuit is employed asthe DC level variation detecting circuit 5. Accordingly, not only DCcomponents but also level variations in very low frequency componentscan be detected. Therefore, for such low frequencies, negative feedbackis effected to thereby improve the stability of circuit. According tothis system, since the emitter voltage of the transistor Q₂, that is,the voltage appearing at the voltage source line is varied as a functionof DC servo control, this operations has no effect on the signal line.Thus, interference with respect to the signal system does not occurresulting in a more stable DC servo control. In addition, with a circuithaving an extremely simple construction, the above objects of theinvention are accomplished.

It should be noted that an output can be obtained in various manners.For example, the voltage appearing across a resistor connected betweenthe collector of the transistor Q₂ and the current source 3 may be usedas an output. Further, since the ratio of currents flowing through thetransistors Q₁ and Q₂ is constant, variations in current flowing throughthe transistor Q₁ may be taken as an output in a similar manner.

FIG. 5 is a circuit diagram showing a preferred embodiment of apush-pull amplifier having the above-described servo control circuit. InFIG. 5, the same circuit elements as those shown in FIG. 2 aredesignated by the same reference numerals and characters. The output ofthe DC level variation detecting circuit 5 is fed back to the emittersof the transistors Q₂ and Q₆. The emitter resistors R₁ and R₄ of thetransistors Q₂ and Q₆ are connected at a point between voltage dividingresistors R₁₂ and R₁₃ and a point between voltage dividing resistors R₁₄and R₁₅, respectively, the resistors constituting a voltage dividingcircuit of the power source +B₁ and -B₁. The DC servo voltage is appliedto a neutral point A of the voltage dividing circuit.

In this circuit, the conditions of equations (9) to (16) are alsoestablished. Therefore, the same effect as that of the circuit shown inFIG. 2 is obtained. Furthermore, due to the DC servo circuit, when a DClevel variation occurs at the output terminal, a positive servo voltageproportional to the variation is generated by the detecting circuit 5and applied to the emitters of the transistors Q₂ and Q₆. As a result,the currents flowing through the transistors Q₂ and Q₆ increase wherebythe currents flowing through the transistors Q₉ and Q₁₀ are alsoincreased. Consequently, the base voltages of the output transistors Q₁₁and Q₁₂ are decreased to thereby reduce the DC level at the outputterminal.

As described above, according to this invention, suppression ofdistortion caused by the base-emitter voltage V_(BE) and elimination ofdistortion caused by even numbered higher harmonics is accomplished.Therefore, suppression of distortion in the output signal is remarkablecompared with an ordinary push-pull amplifier. Furthermore, due to theuse of DC servo control, the stability of the amplifier circuit in verylow frequency ranges is remarkably improved.

While in the above described embodiments, current mirror circuits areemployed to supply current to the respective transistors, other circuitscapable of performing the same function to that of the current mirrorcircuit may be employed if desired.

What is claimed is:
 1. An amplifier circuit comprising:a firsttransistor having a base to which an input signal is applied; a secondtransistor of the conductivity type opposite that of said firsttransistor having a base coupled to an emitter of said first transistor;means for supplying currents to said emitter of said first transistorand a collector of said second transistor, the ratio of said currentsbeing constant; and at least one resistor coupled in series with atleast one of said collector and an emitter of said second transistor forproducing an output signal having a component in proportion to saidcurrent in said second transistor.
 2. The amplifier as defined in claim1 wherein said current supplying means comprises a current mirrorcircuit.
 3. The amplifier as defined in claim 1 or 2 further comprisingmeans for feeding back a signal representing variations in an output ofsaid amplifier to a predetermined circuit point.
 4. An amplifier circuitcomprising:a first transistor having a base to which an input signal isapplied; a second transistor having a base to which an emitter of saidfirst transistor is coupled, said second transistor being opposite inconductivity type to said first transistor; means for supplying currentsto said emitter of said first transistor and a collector of said secondtransistor, said currents having a constant ratio; means for providingan output having a component in proportion to the current flowingthrough said second transistor; and means for detecting variations inthe output of said output providing means to provide a feedback voltagecorresponding to said variations to a predetermined circuit point. 5.The amplifier circuit as defined in claim 4 wherein the output of saiddetecting means is fed back to the emitter side of said secondtransistor.
 6. The amplifier circuit as defined in claim 4 wherein saidfirst transistor is connected in an emitter follower configuration, theemitter follower output of said first transistor being applied to thebase of said second transistor.
 7. An amplifier circuit comprising: afirst PNP transistor, the base of said first PNP transistor beingcoupled to an input terminal; a second NPN transistor, the base of saidsecond NPN transistor being coupled to the emitter of said first PNPtransistor; a third PNP transistor, the collector of said third PNPtransistor being coupled to said emitter of said first PNP transistor; afourth PNP transistor, the base of said fourth PNP transistor beingcoupled to the base of said third PNP transistor and to the collector ofsaid fourth PNP transistor and to the collector of said second NPNtransistor; a first positive voltage source and first and secondnegative voltage sources, the collector of said first PNP transistorbeing coupled to said first negative voltage source; first and secondresistors coupled in series with each other between the emitter of saidsecond NPN transistor and said second negative voltage source; a thirdresistor coupled between the emitter of said fourth PNP transistor andsaid positive voltage source, said emitter of said fourth PNP transistorbeing coupled to an output terminal; a fourth resistor coupled betweenthe emitter of said third PNP transistor and said positive voltagesource; means for producing a signal representing variations in the DClevel of the signal upon said output terminal; and means for invertingthe polarity of said signal representing said variations, the invertersignal being coupled to the junction between said first and secondresistors.